Which Khadas SBC do you use?
git clone --depth 1 GitHub - khadas/fenix: One-stop script set to build Ubuntu/Debian images
Which system do you use? Android, Ubuntu, OOWOW or others?
Ubuntu
Which version of system do you use? Khadas official images, self built images, or others?
official
Please describe your issue below:
1、我通过 git clone --depth 1 GitHub - khadas/fenix: One-stop script set to build Ubuntu/Debian images 配置编译时候选择 manlin kernel 5.17 去编译，编译镜像后无法通过EMMC烧录，请问一下修改哪里才能通过EMMC烧录？
2、我也试了选择Uboot2015 kernel4.9去编译，这样编译出来的是可以通过EMMC烧录的，可是后续我把 kernel部分从4.9替换成1部分的 kernel5.17 ，编译出来的镜像通过EMMC烧录到板子上却无法启动，其他log如下部分内容所示。
Post a console log of your issue below:
?G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.?!,K??х? ?}???с0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180
TE: 114969
BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
Board ID = 4
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 000208f6
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
board id: 4
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part : 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000 , part: 0
00000000
emmc switch 0 ok
fastboot data verify
verify result: 265
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
channel==0
RxClkDly_Margin_A0==97 ps 10
TxDqDly_Margin_A0==116 ps 12
RxClkDly_Margin_A1==97 ps 10
TxDqDly_Margin_A1==116 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==24
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==24
DeviceVref_Margin_A1==40
channel==1
RxClkDly_Margin_A0==106 ps 11
TxDqDly_Margin_A0==116 ps 12
RxClkDly_Margin_A1==106 ps 11
TxDqDly_Margin_A1==116 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==24
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==25
DeviceVref_Margin_A1==40
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
soc_vref_reg_value 0x 0000001d 0000001e 0000001e 0000001d 0000001c 0000001e 0000 001c 0000001e 0000001e 0000001d 0000001d 0000001d 0000001e 0000001e 0000001a 000 0001e 0000001d 0000001d 0000001d 0000001c 0000001c 0000001c 0000001d 0000001b 00 00001f 0000001f 0000001e 0000001e 0000001f 0000001d 0000001d 0000001e dram_vref_ reg_value 0x 0000004c
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
100bdlr_step_size ps== 437
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part : 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000bc000, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
OPS=0x10
ring efuse init
chipver efuse init
29 0b 10 00 01 1b 24 00 00 08 30 30 36 55 34 50
[0.018961 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):4fc40b1
NOTICE: BL31: Built : 15:58:17, May 22 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
U-Boot 2015.01 (May 23 2022 - 15:34:19)
DRAM: 3.8 GiB
Relocation Offset is: d6e78000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f4b8a0
aml_i2c_init_port init regs for 0
board init over -----
MMC: aml_priv->desc_buf = 0x00000000d3e68a70
aml_priv->desc_buf = 0x00000000d3e6adb0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x152000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
start dts,buffer=00000000d3e6d620,dt_addr=00000000d3e6d620
get_partition_from_dts() 91: ret 0
parts: 3
00: logo 0000000000800000 1
01: ramdisk 0000000002000000 1
02: rootfs ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
mmc env offset: 0x6c00000
In: serial
Out: serial
Err: serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3477: calc a7ad3a2b, store a7ad3a2b
_verify_dtb_checksum()-3477: calc a7ad3a2b, store a7ad3a2b
dtb_read()-3694: total valid 2
update_old_dtb()-3675: do nothing
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv…
cvbs: cpuid:0x29
Net: [KM]Error:f[keymanage_dts_get_key_device]L100:/unify not parsed yet!
[KM]Error:f[_get_km_ops_by_name]L248:key eth_exphy_para not know device 4
[KM]Error:f[key_unify_read]L312:key[eth_exphy_para] no cfg in dts
dwmac.ff3f0000 Waiting for PHY auto negotiation to complete… done
The Best Window is index 39
[KM]Error:f[keymanage_dts_get_key_device]L100:/unify not parsed yet!
[KM]Error:f[_get_km_ops_by_name]L248:key eth_exphy_para not know device 4
[KM]Error:f[key_unify_write]L279:key[eth_exphy_para] no cfg in dts
dwmac.ff3f0000
amlkey_init() enter!
[EFUSE_MSG]keynum is 1
upgrade_step=2
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 1
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
Hit Enter or space or Ctrl+C key to stop autoboot – : 0
pll tsensor avg: 0x1fe6, u_efuse: 0x8119
temp1: 34
ddr tsensor avg: 0x2009, u_efuse: 0x80e2
temp2: 36
device cool done
cfgload: start …
cfgload: reading /boot.ini from mmc 0:1 …
card out
** Bad device mmc 0 **
cfgload: no /boot.ini or empty file on mmc 0:1
cfgload: reading /boot/boot.ini from mmc 0:1 …
card out
** Bad device mmc 0 **
cfgload: no /boot/boot.ini or empty file on mmc 0:1
cfgload: reading /boot.ini from mmc 1:1 …
Failed to mount ext2 filesystem…
** Unrecognized filesystem type **
cfgload: no /boot.ini or empty file on mmc 1:1
cfgload: reading /boot/boot.ini from mmc 1:1 …
Failed to mount ext2 filesystem…
** Unrecognized filesystem type **
cfgload: no /boot/boot.ini or empty file on mmc 1:1
cfgload: reading /boot/boot.ini from mmc 1:5 …
8041 bytes read in 7 ms (1.1 MiB/s)
cfgload: applying boot.ini…
[#] Script a:d3e6ecb0 l:8021 c:0 s:0 - run
Starting boot.ini…
uboot type: vendor
Scanning mmc 0:1…
card out
** Bad device mmc 0 **
Scanning mmc 0:5…
card out
** Bad device mmc 0 **
Scanning mmc 1:1…
** Unrecognized filesystem type **
Scanning mmc 1:5…
11419856 bytes read in 355 ms (30.7 MiB/s)
32719360 bytes read in 986 ms (31.6 MiB/s)
79805 bytes read in 14 ms (5.4 MiB/s)
3703 bytes read in 10 ms (361.3 KiB/s)
Import env.txt
Can not get u-boot part UUID, set to NULL
Set default mac address to ethaddr: 00:15:18:01:81:31!
Booting mainline kernel…
Apply dtbo uart3
** File not found boot/dtb/overlays//uart3.dtbo **
Apply dtbo pwm_f
** File not found boot/dtb/overlays//pwm_f.dtbo **
Apply dtbo i2c3
** File not found boot/dtb/overlays//i2c3.dtbo **
Apply dtbo os08a10
** File not found boot/dtb/overlays//os08a10.dtbo **
HDMI: Autodetect: 1080p60hz
Loading init Ramdisk from Legacy Image at 13000000 …
Image Name: uInitrd
Image Type: AArch64 Linux RAMDisk Image (gzip compressed)
Data Size: 11419792 Bytes = 10.9 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum … OK
load dtb from 0x1000000 …
Flattened Device Tree blob at 01000000
Booting using the fdt blob at 0x1000000
reserving fdt memory region: addr=1000000 size=14000
Loading Ramdisk to d3381000, end d3e65090 … OK
Loading Device Tree to 000000001ffe9000, end 000000001fffffff … OK
Starting kernel …
uboot time: 6673539 us