Unexportable GPIO pins on VIM3L

The next Pins cannot be exported in the VIM3L:
(Fenix, ubuntu, server bionic)

Physical PIN 26: "write error: Invalid argument"
pin 3 (GPIOAO_3) pinctrl@ff800014
export number: 496 - 0 + 3 = 499

Physical PIN 29: "write error: Invalid argument"
pin 51 (GPIOA_1)  pinctrl@ff634480
export number: 410 - 0 + 51 = 461 

Physical PIN 31: "write error: Invalid argument"
pin 53 (GPIOA_3)  pinctrl@ff634480
export number: 410 - 0 + 53 = 463

Physical PIN 32: "write error: Invalid argument"
pin 52 (GPIOA_2)  pinctrl@ff634480
export number: 410 - 0 + 52 = 462

Physical PIN 33: "write error: Invalid argument"
pin 54 (GPIOA_4)  pinctrl@ff634480
export number: 410 - 0 + 54 = 464

Physical PIN 35: "Device or resource busy"
pin 73 (GPIOX_7)  pinctrl@ff634480 
export number: 410 - 0 + 73 = 483

any thoughts? @numbqq @Frank

Thank you!

@quatro You need to check the dts whether these GPIOs are used as other functions.

For example, GPIOAO_3 is used as I2C by default, if you want to use it as GPIO, you need to disable I2C function in dts.

I disabled i2c_AO, and now it keeps on rebooting… has the mcu something to do with this? I messed up apparently.

&i2c_AO {
status = “disabled”;
pinctrl-names=“default”;
pinctrl-0=<&ao_i2c_master_pins1>;
clock-frequency = <400000>; /* default 100k */

	khadas-tca6408{
		compatible = "khadas-tca6408";
		reg = <0x20>;
		status = "okay";
	};

	hym8563: hym8563@51 {
		compatible = "haoyu,hym8563";
		reg = <0x51>;

		#clock-cells = <0>;
	};

	khadas-mcu {
		compatible = "khadas-mcu";
		reg = <0x18>;
		fan,trig_temp_level0 = <50>;
		fan,trig_temp_level1 = <60>;
		fan,trig_temp_level2 = <70>;
		hwver = "VIM3.V11"; /* Will be updated in uboot. */
	};
};

@quatro Yes, many devices on i2c_AO.

How can I disable just the physical pins I need? Can you tell me the specifics so that I don’t waste time reverse engineering the board?

Thank you!
Joel

Ok, so I have found the pins for myself…

I gained access to pins 29 to 33 by disabling i2s audio.

I gained access to pin 35, I was mislead by the name PWM_F in the shematic documentation, pin 35 is not GPIOX_7 like I posted, it is GPIOH_5.

gaining access to PIN 26 makes the board UNBOOTABLE…
what’s the logic behind exposing System Critical hardwired GPIOs to the 40 pin header? It would be best to have 40 actually usable pins without having to break the entire board built-in functions/services, hope I’m wrong

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You’d better don’t disable I2C_AO, MCU and GPIO expander are on this bus.

Yes, we hope too, but the GPIOs are really scarce…

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I want to know how to you disableing i2s audio , can you help me?

sure… I disabled it from the DTB. You need to download fenix, modify the file kvim3l_linux.dts, recompile it into DTB and deploy it to your board.

in the dts, I think it was the device
tdmb: tdm@1

change the status from okay to “disabled”

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thank you very much
image
i have done it.and i need download fenix to disable i2s even if i compile android .

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fenix I think is only for ubuntu… did it work for you?