Hi all,
I encountered some problem when bringing up my VIM3pro EVK.
I have burned this image to the SD card:
https://dl.khadas.com/Firmware/VIM3/Ubuntu/SD_USB/VIM3_Ubuntu-server-focal_Linux-5.16-rc2_arm64_SD-USB_V1.0.9-211217.img.xz
But it’s failed to bring up from the SD card image, here are the logs from VIM3pro’s console port.
Is there any hardware issue on my VIM3pro EVK?
G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;CHK:1F;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180
TE: 204617
BL2 Built : 16:01:39, May 25 2020. g12b gb6bfa83 - gongwei.chen@droid11-sz
Board ID = 7
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 0003682d
eMMC boot @ 1
sw8 s
board id: 7
Load FIP HDR DDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
Get wrong ddr fw magic! Error!!
fw parse done
PIEI prepare done
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
00000000
emmc switch 0 ok
fastboot data verify
result: 255
Cfg max: 12, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
LPDDR4_PHY_V_0_1_22-Built : 16:01:44, May 25 2020. g12b gb6bfa83 - gongwei.chen@droid11-sz
ddr clk to 1608MHz
00000000
emmc switch 1 ok
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : ERROR : Training has failed!
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 12, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : ERROR : Training has failed!
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 12, cur: 3. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : ERROR : Training has failed!
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 12, cur: 4. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : ERROR : Training has failed!
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 12, cur: 5. Board id: 0. not match..skip..
Cfg max: 12, cur: 6. Board id: 0. not match..skip..
Cfg max: 12, cur: 7. Board id: 0. not match..skip..
Cfg max: 12, cur: 8. Board id: 0. not match..skip..
Cfg max: 12, cur: 9. Board id: 0. not match..skip..
Cfg max: 12, cur: 10. Board id: 0. not match..skip..
Cfg max: 12, cur: 11. Board id: 0. not match..skip..
Cfg max: 12, cur: 12. Board id: 0. not match..skip..
All ddr config failed...
Reset...
boot times 0