Which Khadas SBC do you use?
Target Machine: Vim3
Host Machine: Ubuntu 22.10
Which version of system do you use? Khadas official images, self built images, or others?
Using U-boot source from here: GitHub - khadas/khadas-uboot: khadas-uboot
Using some images of U-boot from this folder: dl.khadas.com - Index of /Firmware/vim3/uboot/mainline/
Using some custom U-boot binaries
Please describe your issue below:
What is the process for flashing a new version of uboot to a Vim3 board? I am attempting to load a new version of U-boot to the board, but I am unaware of how to transfer the uboot.sd.bin file to the board. I will detail how I have made these images and then how I have attempted to load not only my custom images but the official images as well
Building the U-boot image
- First pull the khadas-u-boot source from GitHub - khadas/khadas-uboot: khadas-uboot
a. It looks like there might be several uboot sources. Should users be looking at[this](https://github.com/khadas/u-boot/tree/khadas-vims-v2015.01)or this for their uboot source? - Then I use the bash script
scripts/prepareandscripts/make- This is where the first issue arises, when running
./scripts/preparethis error appears
- This is where the first issue arises, when running
~/khadas-uboot$ ./scripts/prepare
[i] prepare tc
[i] make_010_dtc.sh
[i] make dtc-1.6.0.tar.gz
[i] DOWNLOAD https://github.com/dgibson/dtc/archive/v1.6.0.tar.gz => dtc-1.6.0.tar.gz DIR …/…/dl
[w] already downloaded
CHK version_gen.h
CC fdtdump.o
In file included from fdtdump.c:14:
In function ‘fdt_set_magic’,
inlined from ‘main’ at fdtdump.c:220:3:
libfdt/libfdt.h:251:28: error: array subscript ‘struct fdt_header[0]’ is partly outside array bounds of ‘unsigned char[4]’ [-Werror=array-bounds]
251 | fdth->name = cpu_to_fdt32(val);
| ~^
libfdt/libfdt.h:253:1: note: in expansion of macro ‘fdt_set_hdr_’
253 | fdt_set_hdr_(magic);
| ^~~~~~~~~~~~
fdtdump.c: In function ‘main’:
fdtdump.c:216:31: note: object ‘smagic’ of size 4
216 | unsigned char smagic[FDT_MAGIC_SIZE];
| ^~~~~~
cc1: all warnings being treated as errors
make: *** [Makefile:345: fdtdump.o] Error 1
[i] prepare tc DONE
-
- the environment already has device-tree-compiler downloaded, it seems that this error has already been reported (see this forum post).
What needs to be corrected forscripts/prepareto function correctly? - Next I use the
./scripts/makescript. I would have thought that after a failure in prepare that the make script would not run. However I can see that files are created in my/tmpfolder such askhadas-uboot-buildandu-boot-mainlineand several u-boot files such asu-boot.sd.bin. - The bin output here does not meet the naming convention listed here in the documentation. Is this the correct output bin file from the make script?
- the environment already has device-tree-compiler downloaded, it seems that this error has already been reported (see this forum post).
Flashing the U-boot Image
- The next step is flashing the bin file to an sd card and loading the flashed file onto the Vim3 board
> G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
>
>L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180
>
>TE: 231891
>
>BL2 Built : 19:23:21, Sep 18 2020. g12b g9fde858 - gongwei.chen@droid11-sz
>
>Board ID = 10
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 0003d30e
eMMC boot @ 0
sw8 s
board id: 10
Load FIP HDR DDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
Get wrong ddr fw magic! Error!!
fw parse done
PIEI prepare done
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
NO find ddr boot_info from eMMC
fastboot data verify
result: 255
Cfg max: 12, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
>
>LPDDR4_PHY_V_0_1_22-Built : 14:57:26, Sep 1 2020. g12b g3c95fed - gongwei.chen@droid11-sz
ddr clk to 1608MHz
00000000
emmc switch 0 ok
>
>dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of read delay center optimization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
>
>soc_vref_reg_value 0x 00000028 00000028 00000025 00000025 00000026 00000024 00000026 00000024 00000024 00000027 00000025 00000026 00000025 00000028 00000025 00000026 0000002a 00000028 00000026 00000028 00000025
dram_vref_reg_value 0x 00000016
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
>
>non-sec scramble use zero key
ddr scramble enabled
>
>100bdlr_step_size ps== 450
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x0010ac00, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
[Image: g12b_v1.1.3396-c893a7153 2020-11-11 13:54:36 gongwei.chen@droid11-sz]
OPS=0x10
ring efuse init
chipver efuse init
29 0b 10 00 01 18 10 00 00 18 30 34 33 42 42 50
[0.016082 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):5c909a099
NOTICE: BL31: Built : 17:18:21, Nov 20 2020
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
>
>
>U-Boot 2015.01-g10d1af967c (Dec 20 2021 - 09:34:48)
>
>DRAM: 3.8 GiB
Relocation Offset is: d6d38000
mmu cfg end: 0xe0000000
mmu cfg end: 0xe0000000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7e826c0
aml_i2c_init_port init regs for 0
MCU version: 0x00 0x03
MCU version is to low! Doesn't support froce boot from SD card.
NAND: get_sys_clk_rate_mtd() 292, clock setting 200!
bus cycle0: 6,timing: 7
NAND device id: 0 9f ff ff ff ff
No NAND device found!!!
nand init failed: -6
get_sys_clk_rate_mtd() 292, clock setting 200!
bus cycle0: 6,timing: 7
NAND device id: 0 9f ff ff ff ff
No NAND device found!!!
nand init failed: -6
MMC: aml_priv->desc_buf = 0x00000000d3d28a70
aml_priv->desc_buf = 0x00000000d3d2adb0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, cmd->cmdarg=0x1aa, status=0x3ff2800
emmc/sd response timeout, cmd55, cmd->cmdarg=0x0, status=0x3ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
[set_emmc_calc_fixed_adj][875]find fixed adj_delay=20
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
start dts,buffer=00000000d3d2d620,dt_addr=00000000d3d2d620
get_partition_from_dts() 92: ret 0
parts: 17
00: logo 0000000000800000 1
01: recovery 0000000001800000 1
02: misc 0000000000800000 1
03: dtbo 0000000000800000 1
04: cri_data 0000000000800000 2
05: param 0000000001000000 2
06: boot 0000000001000000 1
set has_boot_slot = 0
07: rsv 0000000001000000 1
08: metadata 0000000001000000 1
09: vbmeta 0000000000200000 1
10: tee 0000000002000000 1
11: vendor 000000001c000000 1
12: odm 0000000008000000 1
13: system 0000000064000000 1
14: product 0000000008000000 1
15: cache 0000000046000000 2
16: data ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
mmc env offset: 0x4d400000
In: serial
Out: serial
Err: serial
aml log : internal sys error!
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3354: calc 82c4fa02, store 82c4fa02
_verify_dtb_checksum()-3354: calc 82c4fa02, store 82c4fa02
dtb_read()-3569: total valid 2
update_old_dtb()-3550: do nothing
aml_i2c_init_port init regs for 0
fusb302_init: Device ID: 0x91
CC connected in 1 as UFP
fusb302 detect chip.port_num = 0
amlkey_init() enter!
[EFUSE_MSG]keynum is 1
vpu: driver version: v20190313
vpu: detect chip type: 9
vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set_vpu_clk
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: set_vpu_clk finish
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv..............
hdr_func 4, hdr_process_select 0x1
cvbs: cpuid:0x29
cvbs: find performance_pal config
LCD_RESET PIN: 0
lcd: lcd_debug_print flag: 0
lcd: detect mode: tablet, key_valid: 0
lcd: detect lcd_clk_path: 1
lcd: failed to get lcd_cpu_gpio_names
lcd: load config from dts
lcd: pinctrl_version: 2
lcd: use panel_type=lcd_1
lcd: bl: pinctrl_version: 2
lcd: bl: name: backlight_pwm, method: 1
lcd: error: gpio: wrong name invalid
lcd: bl: pwm_reg=0x00800002
lcd: bl: aml_bl_power_ctrl: 0
Net: use internal ethernet
--------ext_ethernet=0
+++++++++ext_ethernet=0
dwmac.ff3f0000amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 1
MACADDR:02:00:00:10:18:01(from chipid)
>
>ramdump_init, add:0, size:0
CONFIG_AVB2: null
Start read misc partition datas!
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
active slot = 0
>
>wipe_data=successful
wipe_cache=successful
upgrade_step=2
aml log : internal sys error!
reboot_mode:::: cold_boot
lcd: error: outputmode[576cvbs] is not support
hpd_state=0
do_hpd_detect: hdmimode=1080p60hz
do_hpd_detect: colorattribute=444,8bit
Saving Environment to aml-storage...
mmc env offset: 0x4d400000
Writing to MMC(1)... done
no sink, fallback to 720p60hz[4]
hdr mode is 0
dv mode is ver:0 len: 0
hdr10+ mode is 0
read hdmichecksum 0x00000000, colorattribute 444,8bit
read hdmimode 1080p60hz, colorspace <NULL>, colordepth <NULL>
do_get_parse_edid: autoMode = false, manualMode=16
isYuv4kSink: false, maxTMDSRate=150
do_get_parse_edid: non-yuv4k sink: inColorSpace: HDMI_COLOR_FORMAT_RGB
do_get_parse_edid: default inColorDepth: HDMI_COLOR_DEPTH_24B
TV is same, initial mode is: 576cvbs attr: 444,8bit
dolby_status 0
dolby_status 0
dolby_vision_process: no tv and dv disabled
Saving Environment to aml-storage...
mmc env offset: 0x4d400000
Writing to MMC(1)... done
[OSD]load fb addr from dts:/meson-fb
[OSD]set initrd_high: 0x7f800000
[OSD]fb_addr for logo: 0x7f800000
[OSD]load fb addr from dts:/meson-fb
[OSD]fb_addr for logo: 0x7f800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x7f800000 width=3840, height=2160
[OSD]osd_hw.free_dst_data: 0,719,0,575
[OSD]osd1_update_disp_freescale_enable
vpp: vpp_matrix_update: 2
cvbs_performance_enhancement
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
hdr_packet
vpp: hdr_policy = 1
vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0
normal power on
boot wol: disable
[reg_31] 0xd8a
[reg_16] 0x0
[reg_17] 0x7fff
[reg_19] 0x0
[reg_31] 0x0
[reg_31] 0xd40
[reg_22] 0x0
[reg_31] 0x0
saradc: 0x34d, hw_ver: 0x0 (Unknow)
>
>
>gpio: pin GPIOAO_7 (gpio 7) value is 1
port mode is usb3.0
Command: bcb uboot-command
Start read misc partition datas!
BCB hasn't any datas,exit!
>
>
>Hit Enter or space or Ctrl+C key to stop autoboot -- : 0
kvim3#run update
InUsbBurn
wait for phy ready count is 0
noSof
sof timeout, reset usb phy tuning
card in
co-phase 0x2, tx-dly 0, clock 400000
co-phase 0x2, tx-dly 0, clock 400000
co-phase 0x2, tx-dly 0, clock 400000
co-phase 0x2, tx-dly 0, clock 400000
co-phase 0x2, tx-dly 0, clock 40000000
[set_emmc_calc_fixed_adj][875]find fixed adj_delay=20
init_part() 282: PART_TYPE_DOS
[mmc_init] mmc init success
Device: SDIO Port B
Manufacturer ID: 27
OEM: 5048
Name: SD32G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: (0x734400000 Bytes) 28.8 GiB
mmc clock: 40000000
Bus Width: 4-bit
** Unrecognized filesystem type **
Device: SDIO Port B
Manufacturer ID: 27
OEM: 5048
Name: SD32G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: (0x734400000 Bytes) 28.8 GiB
mmc clock: 40000000
Bus Width: 4-bit
** Unrecognized filesystem type **
** Unrecognized filesystem type **
(Re)start USB...
USB0: USB3.0 XHCI init start
Register 3000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus 0 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
** Bad device usb 0 **
** Bad device usb 0 **
Start read misc partition datas!
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
active slot = 0
active_slot: normal
Unknown command 'wipeisb' - try 'help'
avb2: 0
ee_gate_off ...
avb2: 0
>##Booting Android Image at 0x03080000 ...
-
- The issue seems to be that the filesystem is not recognized by uboot to allow for the sdc_burning commands to run. Are there any other ways to flash a u-boot.sd.bin file to the vim3?
TL;DR
How can I take an official (or custom) u-boot binary file and transfer it over to the VIM3 board?
Please let me know if I can provide any other information about the build or flash process.