G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180TE: 100981
BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
Board ID = 8
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 0001d252
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
board id: 8
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
00000000
emmc switch 0 ok
fastboot data verify
verify result: 265
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0dmc_version 0001
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 4, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!channel==0
RxClkDly_Margin_A0==97 ps 10
TxDqDly_Margin_A0==106 ps 11
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==69
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==29
DeviceVref_Margin_A0==35
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0channel==1
RxClkDly_Margin_A0==77 ps 8
TxDqDly_Margin_A0==106 ps 11
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==27
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==20
DeviceVref_Margin_A0==27
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
soc_vref_reg_value 0x 00000027 00000027 00000027 00000026 00000028 00000026 00000025 00000027 00000027 00000026 00000027 00000026 00000027 00000027 00000027 00000028 00000027 00000029 00000027 00000027 00000026 00000026 00000025 00000027 00000026 00000026 00000025 00000027 00000027 00000025 00000025 00000026 dram_vref_reg_value 0x 00000014
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass100bdlr_step_size ps== 425
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000d0000, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
OPS=0x10
ring efuse init
chipver efuse init
29 0b 10 00 01 08 21 00 00 06 35 32 33 57 33 50
[0.018961 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):4fc40b1
NOTICE: BL31: Built : 15:58:17, May 22 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fastU-Boot 2015.01 (Apr 21 2022 - 02:54:33)
DRAM: 2 GiB
Relocation Offset is: 76e42000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 0000000077f39230
aml_i2c_init_port init regs for 0
[aml_i2c_xfer] error ret = -5 i2c master b current slave addr is 0x18
i2c_read: i2c transfer failed
[aml_i2c_xfer] error ret = -5 i2c master b current slave addr is 0x18
i2c_read: i2c transfer failed
check_forcebootsd i2c_read failed!
[aml_i2c_xfer] error ret = -5 i2c master b current slave addr is 0x20
i2c_write: i2c transfer failed
tca6408_write_reg failed, reg: 3, val: 0, error: -5
MMC: aml_priv->desc_buf = 0x0000000073e32a70
aml_priv->desc_buf = 0x0000000073e34db0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x3ff2800
emmc/sd response timeout, cmd55, status=0x3ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x2000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
start dts,buffer=0000000073e37620,dt_addr=0000000073e37620
get_partition_from_dts() 91: ret 0
parts: 3
00: logo 0000000000800000 1
01: ramdisk 0000000002000000 1
02: rootfs ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
mmc env offset: 0x6c00000
In: serial
Out: serial
Err: serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3477: calc 669ca76, store 669ca76
_verify_dtb_checksum()-3477: calc 669ca76, store 669ca76
dtb_read()-3694: total valid 2
update_old_dtb()-3675: do nothing
aml_i2c_init_port init regs for 0
fusb302 i2c probe failed: -19amlkey_init() enter!
[EFUSE_MSG]keynum is 1
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv…
cvbs: cpuid:0x29
[aml_i2c_xfer] error ret = -5 i2c master b current slave addr is 0x20
i2c_read: i2c transfer failed
tca6408_read_reg failed, reg: 3, error: -5
board_lcd_detect: failed to read LCD_RESET status! error: -5
lcd: detect mode: tablet, key_valid: 0
lcd: detect lcd_clk_path: 1
lcd: load config from dts
lcd: pinctrl_version: 2
lcd: use panel_type=lcd_0
lcd: bl: pinctrl_version: 2
lcd: bl: name: backlight_pwm, method: 1
lcd: bl: aml_bl_power_ctrl: 0
[aml_i2c_xfer] error ret = -5 i2c master b current slave addr is 0x18
i2c_write: i2c transfer failed
Error writing the chip: -5
@numbqq @Frank 帮忙看看看什么问题
你用的是哪个固件？可以用我们最新release的固件试一下。https://dl.khadas.com/products/vim3/firmware/Ubuntu/EMMC/vim3-ubuntu-20.04-server-linux-4.9-fenix-1.0.11-220429-emmc.img.xz
还有就是你用的是我们的VIM3吗？有没有做硬件上的修改？看log是i2c在报错。
是你们的VIM3，谢谢，我试了下这个固件没问题