Instruction sets missing form the VIM3L armv8.2-a standards

using py-cpuinfo on an image built for VIM3L built from Fenix. I seem to be missing shar3, sha512, sm3, and sm4, maybe SVE but that’s an optional item to the default instruction sets for armv8.2-a standards? were these disabled, or have they just not been enabled in the kernel. Any help would be greatly appreciated.

The ARM Cortex-A73 is compliant to the ARMv8.0-A specification, and thus should not be expected to have features introduced in ARMv8.1-A or ARMv8.2-A.

You would be correct if I was talking about the VIM 3’s A311D chip, however, this is about the VIM 3L, which has the S905D3, which is built with Cortex-A55 this is an ARM8.2-a chip. The kernel would need to have the support enabled for ARMV8.2 and ARMV8.3 to enable these advanced features. If Khadas is just adding the DTB file to the image for the VIM 3 they need to actually make a separate image for the VIM 3L.

Whoops, sorry. Must have missed that when I read it. >.<