So I received my VIM3 today, and it operates inconsistently. Most of the time it is in the “auto-boot” mode displaying the same things over and over, see below.
Sometimes it will boot into Android, but it surprised me the first time it did it. But what I really want to do is get into U-Boot mode so that I can go through the process of trying to get Fuchsia working. I have a serial cable attached but it only sometimes get into U-Boot mode and give me the kvim#
prompt.
I have found that if it does boot to Android and I then press the reset button, it will fairly consistently get into U-Boot mode if I hit the return key after pressing reset. But if I power cycle the VIM3 it almost never will get into U-Boot again, unless it boots into Android. But it very inconsistently boots into Android, so it is very frustrating.
I’m on an Arch Linux system using minicom to connect via /dev/ttyUSB0
. Any help would be much appreciated.
Thanks,
Wink
Welcome to minicom 2.8
OPTIONS: I18n
Compiled on Jan 9 2021, 12:42:45.
Port /dev/ttyUSB0, 19:56:29
Press CTRL-A Z for help on special keys
G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.�!,K��х��}����1
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180
TE: 198186
BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
Board ID = 8
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
.... <Alot of lines removed>
wipe_data=successful
wipe_cache=successful
upgrade_step=2
reboot_mode:::: cold_boot
lcd: error: outputmode[2160p60hz] is not support
hpd_state=0
edid preferred_mode is <NULL>[0]
hdr mode is 0
dv mode is ver:0 len: 0
hdr10+ mode is 0
[OSD]load fb addr from dts:/meson-fb
[OSD]set initrd_high: 0x7f800000
[OSD]fb_addr for logo: 0x7f800000
[OSD]load fb addr from dts:/meson-fb
[OSD]fb_addr for logo: 0x7f800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x7f800000 width=3840, height=2160
[OSD]osd_hw.free_dst_data: 0,719,0,575
[OSD]osd1_update_disp_freescale_enable
vpp: vpp_matrix_update: 2
cvbs performance type = 9, table = 0
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
vpp: RG12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180
TE: 197874
BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
Board ID = 8
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz