I’m afraid - this is gonna be really tricky. Amlogic Linux Kernel 4.9 tree is a vendor changed kernel and isn’t much the same what original 4.9 kernel was. Amlogic kernel had a lot of changes made, so RT patches against it will not apply cleanly… that is what patch is saying to you…
Hunk #1 FAILED at 39.
1 out of 1 hunk FAILED – saving rejects to file arch/arm64/kernel/asm-offsets.c.rej
…
1 out of 1 hunk FAILED – saving rejects to file arch/arm64/kernel/asm-offsets.c.rej
patching file arch/arm64/kernel/entry.S
Hunk #1 FAILED at 1764.
1 out of 1 hunk FAILED – saving rejects to file drivers/usb/core/hcd.c.rej
and so on… you can of course read what have been rejected and try to fix by yourself - but I bet won’t be much luck without knowing ARM assembly and platform details… Too much work in any case.
The only way you can go - is switch to mainline kernel and continue with RT patches… but you’ll definitely loose some functions - like MIPI - DSI output and some smaller features…
Thanks to your reminder and guidance, I realized that there was an error in the patching, and as you suggested, I now use the mainline linux to patch, successfully compile and produce the image. As for the loss of functionality you mentioned, I haven’t tested it yet, and I currently only need to use the communication functions of i2c, spi and uart.
It will require changes to mainline DTS files to enable them as overlays aren’t on in mainline afaik, UART3 is off by default for sure… I2c - should work… but this is pretty easy to accomplish…
Forgive my poor knowledge about DTS, I don’t know what to do with that file and how to do it, especially now that using fenix finds that Linux has become 5.17.
I want to use the spi to receive data from two spi slave sensors, like mpu6000 etc.
In 5.17 Fenix build - Khadas team added kernel overlay config option - I assume usual overlays from uboot and 4.9 kernel should work now to enable usart3 and spi. @hyphop - Artem can you confirm this ?
Briefly, the overlays failed, and then the dts were modified, but it still failed, so I suspect that I modified the configuration of the dts by mistake
burn it into SD card,And edit /boot/env.txt with overlays=spi1 os08a10 watchdog
reboot board, find it can’t load kernel,Stuck in Starting kernel …
full output:
G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.�!,K��х��}���с0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:00000000
L1:20000703
L2:00008067
L3:14000000
B2:00402000
B1:e0f83180
TE: 179510
BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
Board ID = 8
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00030513
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
board id: 8
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 265
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1608MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
00000000
emmc switch 0 ok
dmc_version 0001
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
channel==0
RxClkDly_Margin_A0==97 ps 10
TxDqDly_Margin_A0==106 ps 11
RxClkDly_Margin_A1==87 ps 9
TxDqDly_Margin_A1==97 ps 10
TrainedVREFDQ_A0==28
TrainedVREFDQ_A1==27
VrefDac_Margin_A0==30
DeviceVref_Margin_A0==27
VrefDac_Margin_A1==32
DeviceVref_Margin_A1==26
channel==1
RxClkDly_Margin_A0==106 ps 11
TxDqDly_Margin_A0==116 ps 12
RxClkDly_Margin_A1==97 ps 10
TxDqDly_Margin_A1==106 ps 11
TrainedVREFDQ_A0==26
TrainedVREFDQ_A1==26
VrefDac_Margin_A0==32
DeviceVref_Margin_A0==26
VrefDac_Margin_A1==30
DeviceVref_Margin_A1==26
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
soc_vref_reg_value 0x 00000028 00000027 00000028 00000028 0000002a 00000025 00000029 00000028 00000027 00000026 00000029 00000027 00000029 00000028 00000026 00000027 00000027 00000028 00000028 00000026 00000028 00000028 00000028 00000027 00000028 0000002a 0000002a 00000029 00000029 00000027 00000028 0000002b dram_vref_reg_value 0x 00000013
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
100bdlr_step_size ps== 403
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000ac000, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
OPS=0x10
ring efuse init
chipver efuse init
29 0b 10 00 01 09 12 00 00 11 36 32 33 57 33 50
[0.018959 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):4fc40b1
NOTICE: BL31: Built : 15:58:17, May 22 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
U-Boot 2021.04 (May 02 2022 - 23:38:20 -0700) khadas-vim3
Model: Khadas VIM3
SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
DRAM: 3.8 GiB
MMC: sd@ffe03000: 0, sd@ffe05000: 1, mmc@ffe07000: 2
In: serial
Out: serial
Err: serial
fusb302_init: Device ID: 0x91
CC connected in 0 as UFP
fusb302 detect chip.port_num = 0
Net: eth0: ethernet@ff3f0000
Failed to load 'splash.bmp'
Failed to load 'splash.bmp'
1080138 bytes read in 70 ms (14.7 MiB/s)
DISPLAY: setup failsave FullHD mode
starting USB...
Bus usb@ff500000: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff500000 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Setting bus to 0
Hit SPACE in 2 seconds to stop autoboot
Device 0: unknown device
Card did not respond to voltage select! : -110
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot.ini
10134 bytes read in 5 ms (1.9 MiB/s)
## Script run a:08000000 l:10115 c:0
Starting boot.ini...
Setting bus to 0
saradc: 0x0, hw_ver: 0x32 (VIM3.V12)
uboot type: mainline
Scanning mmc 0:1...
Card did not respond to voltage select! : -110
Can't set block device
Scanning mmc 0:5...
Card did not respond to voltage select! : -110
Can't set block device
Scanning mmc 1:1...
10722939 bytes read in 530 ms (19.3 MiB/s)
29248000 bytes read in 1443 ms (19.3 MiB/s)
90207 bytes read in 9 ms (9.6 MiB/s)
Failed to load '/boot/env.txt'
4577 bytes read in 5 ms (893.6 KiB/s)
Import env.txt
Found custom ethmac: c8:63:14:71:00:24, overwrite eth_mac!
Booting legacy kernel...
Setting bus to 0
port mode is usb3.0
Apply dtbo spi1
** Reading file would overwrite reserved memory **
Failed to load '/dtb/overlays/kvim3/spi1.dtbo'
Apply dtbo os08a10
** Reading file would overwrite reserved memory **
Failed to load '/dtb/overlays/kvim3/os08a10.dtbo'
Apply dtbo watchdog
** Reading file would overwrite reserved memory **
Failed to load '/dtb/overlays/kvim3/watchdog.dtbo'
Moving Image from 0x11000000 to 0x11080000, end=12de5000
## Loading init Ramdisk from Legacy Image at 13000000 ...
Image Name: uInitrd
Image Type: AArch64 Linux RAMDisk Image (uncompressed)
Data Size: 10722875 Bytes = 10.2 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 01000000
Booting using the fdt blob at 0x1000000
Loading Ramdisk to 7f5c6000, end 7ffffe3b ... OK
Loading Device Tree to 000000007f547000, end 000000007f5c5fff ... OK
Cannot setup simplefb: node not found
Starting kernel ...
I notice the log
Apply dtbo spi1
** Reading file would overwrite reserved memory **
Failed to load '/dtb/overlays/kvim3/spi1.dtbo'
Apply dtbo os08a10
** Reading file would overwrite reserved memory **
Failed to load '/dtb/overlays/kvim3/os08a10.dtbo'
Apply dtbo watchdog
** Reading file would overwrite reserved memory **
Failed to load '/dtb/overlays/kvim3/watchdog.dtbo'
Maybe it is why the overlays does’t work.
For now,I am going to reburn image via emmc.I start to suspect the SD card.
My goal is to check spi is work under 4.9 kernel(boot from emmc and SD/USB) to exclude Hardware problem